The new Buffy accelerator that Amitopia Amiga Magazine revealed here is now close to the beta testing stage. You can go to their Discord page and show your interest in it if you are interested. And now the price is revealed! Not only that, but the first Buffy accelerator will be available for all Classic computers with a 68000 CPU socket.

This means that the Buffy accelerator will not only be compatible with Amiga 500, Amiga 1000, and Amiga 2000. But also X68000, Macintosh, SEGA consoles using 68000 and even AtariST too.

Amazing speeds for under $200 is a dream come true!

This accelerator will when out improve the speeds for tons of 68000 socket machines, which includes Amiga. The very first Buffy accelerator will be a fantastic upgrade for Amiga 2000 users. They can also use the ZZ9000 RTG card together with this upgrade. The price at $139.95 for the 512MB RAM one and $179.95 for 1GB RAM as the suggested retail price will be interesting when this upgrade hits the market.

Most of the Amiga accelerators on the market today are priced way too much. 8MB mem upgrades for over $100 is just too bad. So, this product will for sure be competitive. However, Amiga’s with CPU glued to the motherboard will have to wait. There will be an adapter for Amiga 600 users it seems. Once that is out, I will provide the info about it as Amiga 600 is a fantastic computer.

For the latest info about the project. Join the Discord page from the Buffy project website. This project deserves attention as it opens new possibilities for Classic Amiga and more.

All the most important Hardware info you should know about The Buffy Accelerator

  1. The big BGA 256 in the middle is the main CPU, an OSD335x-SM. This comes pre-equipped with either 512MB or 1GB of DDR3L-800 SDRAM as well as all power management and related passive components.
  2. The four chips surrounding the CPU are our level shifters; four 20-bit SN74CBTD16210 chips. Since these can do 20-bits, it will be possible in a later revision to omit one of the chips, saving some precious board space. There are also some smaller package options to consider as well.
  3. The first small chip on the bottom is the SPI Flash; 16MB of it, specifically. This may shrink before mass production, but right now it’s a very generous size just in case.
  4. This is new; it’s to isolate the UART from the CPU incase you power-off one unit without powering off the other.
  5. Also new is the TC2030 (Tag-Connect) form-factor UART connection. TX is on pin 2 and RX is on pin 4; the other pads are all ground. This saves a lot of room over the older 0.1” header and with a ground, should be more robust. The UART also serves as a back-up programming port as the Flash can be programmed using XMODEM.
  6. A small addition to performing the warm-reset. Crazy as it sounds, the OSD335x has a 1.8V power good OUTPUT and a 3.3V warm reset INPUT.
  7. This is the 24MHz crystal. I seriously contemplated the idea of making this a programmable oscillator but between running out of room and the complications with the internal clock circuitry this would create, I vetoed myself.
  8. This is 55uF of bulk capacitance on the 3.3V line as specified in the checklist
  9. This is the clamp circuit required to avoid destroying the chip during power-down. It may not be required since we’re not heavily using either the 1.8V or 3.3V power rails. Most of our logic runs at 5V. Anyway, this stops the difference from the 1.8V rail and 3.3V rail from exceeding 2.0V which apparently is “bad”.
  10. This is a high and low-frequency capacitor on the 5V line to help filter out the (possibly) noisy power from the Amiga. The bulk capacitance also helps a little on power dips.
  11. Finally, the JTAG is implemented as a TC2050 connector to the core. JTAG or UART may be used for programming, but JTAG is the only way to debug code efficiently, especially during the initial firmware development phase.

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